FPGA Conference 2021: Breaking the TOPS ceiling with sparse neural ne…
TOPS, Memory, Throughput And Inference Efficiency
A 161.6 TOPS/W Mixed-mode Computing-in-Memory Processor for Energy-Efficient Mixed-Precision Deep Neural Networks (유회준교수 연구실) - KAIST 전기 및 전자공학부
Sparsity engine boost for neural network IP core ...
When “TOPS” are Misleading. Neural accelerators are often… | by Jan Werth | Towards Data Science
11 TOPS photonic convolutional accelerator for optical neural networks | Nature
A List of Chip/IP for Deep Learning | by Shan Tang | Medium
Are Tera Operations Per Second (TOPS) Just hype? Or Dark AI Silicon in Disguise? - KDnuggets
TOPS: The Truth Behind a Deep Learning Lie - EE Times
11 TOPS photonic convolutional accelerator for optical neural networks | Nature
VeriSilicon Launches VIP9000, New Generation of Neural Processor Unit IP | Markets Insider
When “TOPS” are Misleading. Neural accelerators are often… | by Jan Werth | Towards Data Science
11 TOPS photonic convolutional accelerator for optical neural networks | Nature
A 0.32–128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm | Research
PDF) BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W
When “TOPS” are Misleading. Neural accelerators are often… | by Jan Werth | Towards Data Science
TOPS, Memory, Throughput And Inference Efficiency
As AI chips improve, is TOPS the best way to measure their power? | VentureBeat
Are Tera Operations Per Second (TOPS) Just hype? Or Dark AI Silicon in Disguise? - KDnuggets
TOPS, Memory, Throughput And Inference Efficiency
Electronics | Free Full-Text | Accelerating Neural Network Inference on FPGA-Based Platforms—A Survey
Figure 5 from Sticker: A 0.41-62.1 TOPS/W 8Bit Neural Network Processor with Multi-Sparsity Compatible Convolution Arrays and Online Tuning Acceleration for Fully Connected Layers | Semantic Scholar
Figure 1 from A 3.43TOPS/W 48.9pJ/pixel 50.1nJ/classification 512 analog neuron sparse coding neural network with on-chip learning and classification in 40nm CMOS | Semantic Scholar
A 17–95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm | Research
